This invention relates to the field of alternators, and more particularly, this invention relates to the field of regulating an alternator with a pulse width modulated waveform.
An alternator acts as a current mode machine that is controlled by a sensing voltage. A regulator determines the amount of field current required by monitoring the voltage at the output of the alternator, such as in the B+ stud as shown in FIG. 5. The current is regulated by means of a pulse width modulated (PWM) signal that typically has a frequency of about 200 to about 400 Hz. The current changes slowly to the changes in the field voltage as shown in FIG. 5A.
Some prior art alternator based vehicle charging systems control field current in an alternator as a function of the charging system or alternator output voltage. The field current is usually controlled by a 100 to 300 Hz pulse width modulated switch because the time constant for the field is above 300 ms. In lower engine idle revolutions per minute, it is necessary to control the load to have better emissions and mileage. Thus, increases in mechanical loads have to be managed. One mechanical load is the electrical system of the vehicle. When an electrical load is connected in a normal system, the load is translated to a mechanical load and then transferred within a few milliseconds to the engine by means of the alternator.
A The alternator field current is directly proportional to mechanical load. One type of prior art system (FIG. 1) generates a sawtooth waveform using the charging system voltage pad 20 that is input to an error amplifier 22. A capacitor 24 is operative with a triangle waveform generator 26 and inputs that generated waveform signal to a comparator 28 connected to the error amplifier 22. A field driver signal is generated at its output. Another prior art method shown in FIG. 2 uses two external capacitors 30, 32. The first capacitor 30 (C1) generates the sawtooth waveform and the second capacitor 32 (C2) is used to fool the regulation circuit by delaying any decrease in measured system voltage. A diode 34 and resistor 36 are connected in parallel to the charging system voltage pad 20 and the second capacitor 32.
There are several obvious drawbacks to these prior art systems as shown in FIGS. 1 and 2. One drawback is the need for external capacitors. This use of capacitors eliminates the possibility of any solution with a monolithic semiconductor integrated circuit device. A second drawback is the resultant EMC issues. The control loop has a half wave rectifier built in with the diode 34 and capacitor 32 C2. Thus, this circuit acts similar to a charge pump on the measured system voltage.
Other prior art approaches have used digital designs. Current designs that use a digital approach have two basic differences from the analog approaches. The first difference is that the gain circuit is theoretically infinite. There is a threshold at which the field is turned on (sensed voltage below a fixed reference) or off (sensed voltage above a fixed reference). Second, the incremental loading is achieved by a duty cycle register that is incremented when the measured voltage is below the fixed reference and decremented when it is above.
One digital system used today for automotive charging systems is a simple single bit method as shown in FIG. 3. When the system voltage is below a set point, then the field driver is on. When the system voltage is above a set point, then the field driver is off. As illustrated, charging system voltage 20 is input to a comparator 36 that also receives a temperature compensated set point signal 38. Two resistors 39a, 39b provide the divider circuit for the charging system voltage signal.
A digital system does not require any external capacitor to generate a sawtooth waveform, but the field duty cycle frequency is very much system dependent. As a result, there are conditions where the system can become unstable. This instability causes many problems such as lamp flicker.
To compensate for overvoltage situations when alternator loads are removed, an override circuit is implemented to shut off the field even when the duty cycle register is commanding a higher duty cycle. The rate of the incrementing or decrementing of the duty cycle register is set by a fixed rate. This fixed rate is changed at a specific alternator RPM, measured by examining one of the stator signals. Above the set RPM, the rate of change of the duty cycle register is very fast. As shown in FIG. 4, the system voltage is also divided by the resistor 39a, 39b and input into the comparator 36 that has a reference 38. However, a stator input to an amplifier 40 is then input to the frequency detector 42 and divided by N in a circuit 44 that is controlled by an oscillator 46. An up/down counter 48 produces a signal that is then input into a logic gate 50 together with the comparator output to produce the field driver signal for the alternator.
For this type of system, the duty cycle frequency can be unstable at higher loads. At the higher loads, the duty cycle frequency is better controlled by the system than by the internal oscillator. In some cases, this can generate unstability that shows up in the form of lamp flickering or uneven or cyclical loading. Because of the inherent high gain of the regulation loop, the only time the duty cycle appears stable is during incremental loading increases at the lower alternator revolutions per minute.
It is therefore an object of the present invention to provide a system and method for regulating an alternator, such as part of an automotive charging system, that overcomes the disadvantages as noted above.
In accordance with the present invention, a system regulates an alternator and includes a circuit for digitally generating sawtooth waveform. An error amplifier circuit generates a divided down and error amplified alternator system voltage. A comparator circuit receives and compares to each other the digitally generated sawtooth waveform and the error amplified alternator system voltage. This comparator circuit has an output to produce an alternator field input signal used for driving the field of an alternator.
In another aspect of the present invention, the circuit for generating a digitally generated sawtooth waveform further comprises a digital-to-analog converter, a down counter having an output connected to the digital-to-analog converter, and a clock that inputs a clock signal to the down counter. The clock is operative to generate about 20 kHz clock signals to the down counter. The circuit for generating the pulse width modulated waveform, the error amplifier circuit and the comparator circuit can be monolithically formed as a single semiconductor circuit.
An n-bit latchable down counter can be operatively connected to the output of the comparator circuit. A stator prescaler circuit is operatively connected to the n-bit latchable counter. A digital comparator is operatively connected to the n-bit latchable down counter and operatively connected to the circuit that digitally generates a sawtooth waveform. A clock can be operatively connected to the stator prescaler and can produce about a 300 Hz clock signal through the stator prescaler. The stator prescaler is essentially two divide by n circuits controlled by a watchdog timer. When the WD timer does not detect that the stator signal is above 300 Hz, then the larger divide by n (e.g., 2n) is implemented to generate a stator frequency of f(stator)/2n at the clock input of the latchable down counter. If the WD timer detects a 300 Hz or greater signal, the faster divide by n (i.e., n) is used. This increases the rate of change in the incrementing of the field duty cycle at higher alternator rpms.
The n-bit latchable down counter can further comprise an 8-bit latchable down counter. In still another aspect of the present invention, the system regulates an alternator and comprises a circuit for digitally generating a sawtooth waveform. This circuit comprises a down counter having an output, a clock operatively connected to the down counter for driving the down counter, and a digital-to-analog converter connected to the output of the down counter.
An error amplifier circuit generates a divided down and error amplified alternator system voltage. A comparator receives and compares to each other the digitally generated sawtooth waveform and the error amplified alternator system voltage. This comparator has an output. A clock driven stator prescaler circuit has an n-bit latchable down counter operatively connected to the output of the comparator and the stator prescaler circuit. A digital comparator has an input connected to the n-bit latchable down counter and the output of the down counter for producing at a digital comparator output and alternator field driver input signals used for driving the field of an alternator.
In a method aspect of the present invention, the method comprises the step of generating a sawtooth waveform. The method also comprises the step of comparing the sawtooth waveform with a divided down and error amplified alternator system voltage to produce an alternator field input signal. The method also comprises the step of driving the field of an alternator with the alternator field input signal.